Huawei Ascend 950PR

Da Vinci v3 OAM 2026

Overview

—

FP32 TFLOPS

128 GB

Memory HiBL 1.0

1.6 TB/s

Memory Bandwidth

900 W

TDP

Performance Metrics

Precision	Peak (dense)	Bits	Type
FP64	—	—	Standard
FP32	—	—	Standard
TF32	—	—	Standard
BF16	500.0	16	Standard
FP16	500.0	16	Standard
FP8	1000.0	8	Standard
FP6	—	—	Standard
FP4	2000.0	4	Standard
INT8	—	—	Standard

Memory Specifications

Capacity: 128 GB
Type: HiBL 1.0
Bandwidth: 1.6 TB/s
Interface Width: —

Power & Efficiency

TDP: 900 W
Max power (Flopper estimate): ~1.0 kW est.
FP32 dense TFLOPS per W of TDP: —
FP16 dense TFLOPS per W of TDP: 0.56 TFLOPS/W

Flopper estimate: 900 W TDP x 1.15. The vendor publishes no maximum board power for this part. Per W of TDP figures divide dense peak by accelerator TDP. Board power only: excludes host CPUs, networking, cooling and facility overhead.

Hardware Details

Vendor: Huawei

Architecture: Da Vinci v3

Process Node: —

Form Factor: OAM

Launch Year: 2026

Interconnect

GPU-to-GPU: Unified Bus 2.0

Bandwidth: 2.0 TB/s direction and scope not stated by vendor