Huawei Ascend 950PR
Overview
The Huawei Ascend 950PR is the first chip in the 950 generation, announced at Huawei Connect 2025 (September 2025) and partly released as the Atlas 350 accelerator card. It targets prefill and recommendation workloads (compute-heavy, memory-light) with 1 PFLOPS FP8 and 2 PFLOPS MXFP4 dense throughput. Memory is 128 GB of Huawei's proprietary HiBL 1.0 (a low-bandwidth HBM-alternative) delivering 1.6 TB/s, paired with 2.0 TB/s of scale-up interconnect. The chip supports FP32, HF32, FP16, BF16, FP8, MXFP8, HiF8, and MXFP4. Reported full-module TDP is approximately 900W per TrendForce; the Atlas 350 accelerator card variant runs at 600W with 1.4 TB/s memory bandwidth. Specs are based on Huawei's public roadmap disclosure and Atlas 350 announcements; figures may be revised before broader shipping.
Performance
Peak theoretical throughput by precision type
| Precision | Peak |
|---|---|
FP64 | No verified data available |
FP32 | No verified data available |
TF32 | No verified data available |
BF16 Brain Float 16 | 500TFLOPS |
FP16 16-bit floating point | 500TFLOPS |
FP8 8-bit floating point | 1,000TFLOPS |
FP6 | No verified data available |
FP4 4-bit floating point | 2,000TFLOPS |
INT8 | No verified data available |
Dense peak divided by accelerator TDP. Board power only: excludes host CPUs, networking, cooling and facility overhead. TDP for this part: 900 W.
The Ascend 950PR in the GPU landscape
Peak FP16 TFLOPS (dense) against TDP, single-GPU parts tracked by Flopper
Higher and further left is better: more half-precision throughput for less power.
Specifications
Architecture
Da Vinci v3
Form Factor
OAM
Launch Year
2026
Process Node
No verified data available
Memory
128 GB HiBL 1.0
Bandwidth
1,600 GB/s
TDP
900 W
Max power (Flopper estimate)
~1.0 kW est. Flopper estimate: 900 W TDP x 1.15. The vendor publishes no maximum board power for this part.
Interconnect
2.0 TB/s Unified Bus 2.0
direction and scope not stated by vendor
Spec Confidence
Vendor claimed
Full Specifications
| Memory | |
|---|---|
| Memory | 128 GB |
| Memory Type | HiBL 1.0 |
| Bandwidth | 1.6 TB/s |
| Interface Width | No verified data available |
| Interconnect & I/O | |
| GPU-to-GPU | Unified Bus 2.0 |
| Interconnect Bandwidth | 2.0 TB/s direction and scope not stated by vendor |
| Power & Thermal | |
| TDP | 900 W |
| Max power (Flopper estimate) | ~1.0 kW est. |
| General | |
| Form Factor | OAM |
| Architecture | Da Vinci v3 |
| Process Node | No verified data available |
| Launch Year | 2026 |
Datasheet & Resources
Flopper Datasheet
Huawei Ascend 950PR specifications, generated from our database. Printable.
Huawei details its AI chip roadmap through 2028
Tom's Hardware · 2025-09-19
Huawei Ascend Developer Documentation
CANN guides, MindSpore, Da Vinci
Data Provenance
Every figure traced to a source
Primary Source
- Publisher
- Tom's Hardware
- Published
- 2025-09-19
Data Quality
- Spec confidence
- Vendor claimed
- Clock basis
- Boost
- Core precisions with figures
- 4 of 9
- Normalization
- All values in TFLOPS
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Frequently Asked Questions
How many TFLOPS does the Huawei Ascend 950PR have?
The Huawei Ascend 950PR delivers 500 TFLOPS FP16 and 1,000 TFLOPS FP8 at peak. Flopper does not currently have a verified FP32 throughput figure for it.
What is the power consumption of the Huawei Ascend 950PR?
The Huawei Ascend 950PR has a TDP (Thermal Design Power) rating of 900 watts.
How much memory does the Huawei Ascend 950PR have?
The Huawei Ascend 950PR is equipped with 128 GB of memory with 1,600 GB/s of memory bandwidth.
What architecture is the Huawei Ascend 950PR based on?
The Huawei Ascend 950PR is based on the Da Vinci v3 architecture, launched in 2026.
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