BI

Biren BR100

Vendor claimed
Biren SPC OAM 2022 TSMC 7nm
FP32
256.0
TFLOPS
VRAM
64 GB
HBM2E
TDP
550 W
465.5 TFLOPS/kW
Bandwidth
1.6 TB/s
memory

Performance Metrics

Peak theoretical throughput by precision type

PrecisionDescriptionBitsPeak TFLOPSEfficiency
INT88-bit integer82048.03.724 TFLOPS/W
BF16Brain Float 16161024.01.862 TFLOPS/W
TF32TensorFloat-3232512.00.931 TFLOPS/W
FP3232-bit floating point32256.00.465 TFLOPS/W
FP32 Efficiency
0.465 TFLOPS/W
256.0 TFLOPS / 550W

Power Specifications

TDP

550 W

Max Power

633 W

Power Connector

PCIe 16-pin

Cooling

Air

Memory Specifications

Capacity

64 GB

Type

HBM2E

Bandwidth

1600 GB/s

Interface

--

Hardware & Design

Form Factor

OAM

Architecture

Biren SPC

Process Node

TSMC 7nm

Launch Year

2022

Variant

Standard

Market Segment

Data Center

Full Specifications

Memory
VRAM64 GB
Memory TypeHBM2E
Bandwidth1.6 TB/s
Interconnect & I/O
GPU-to-GPUBLink
Interconnect Bandwidth2.3 TB/s
Power & Thermal
TDP550 W
General
Form FactorOAM
ArchitectureBiren SPC
Launch Year2022

Documentation & Resources

Common Use Cases

General Compute AI/ML Workloads Data Processing

The Biren BR100 is optimized for high-performance computing tasks with Biren SPC architecture delivering 256 TFLOPS of compute power.

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