Google TPU 8i NEW

Google's eighth-generation inference TPU, announced alongside the TPU 8t in April 2026 and tuned for serving rather than training. Google publishes a peak of 10.1 PFLOPS of FP4 per chip, with 288 GB of HBM at 8,601 GB/s — about 1.3 times the TPU 8t's bandwidth — and 384 MB of on-chip Vmem SRAM, three times the 8t's, enough to hold a long-context KV cache on silicon. It uses a Boardfly topology rather than a torus, joining up to 1,152 chips with a maximum seven-hop ICI network diameter and up to 1,024 of them active. FP4 is the only precision Google states; nothing else is published or inferred. Google publishes no sparse figure for any TPU, so this is a dense rate.