HU
Huawei Ascend 910B
Da Vinci v2 OAM 2024 SMIC 7nm
VRAM
64 GB
HBM2e
TDP
400 W
Bandwidth
1.6 TB/s
memory
Performance Metrics
Peak theoretical throughput by precision type
| Precision | Description | Bits | Peak TFLOPS | Efficiency |
|---|---|---|---|---|
| INT8 | 8-bit integer | 8 | 800.0 | 2.000 TFLOPS/W |
| FP16 | 16-bit floating point | 16 | 400.0 | 1.000 TFLOPS/W |
| BF16 | Brain Float 16 | 16 | 400.0 | 1.000 TFLOPS/W |
FP16 Efficiency
1.000 TFLOPS/W
400.0 TFLOPS / 400W
Power Specifications
TDP
400 W
Max Power
460 W
Power Connector
PCIe 16-pin
Cooling
Air
Memory Specifications
Capacity
64 GB
Type
HBM2e
Bandwidth
1600 GB/s
Interface
--
Hardware & Design
Form Factor
OAM
Architecture
Da Vinci v2
Process Node
SMIC 7nm
Launch Year
2024
Variant
Standard
Market Segment
Data Center
Full Specifications
| Memory | |
|---|---|
| VRAM | 64 GB |
| Memory Type | HBM2e |
| Bandwidth | 1.6 TB/s |
| Interconnect & I/O | |
| GPU-to-GPU | HCCS |
| Interconnect Bandwidth | 392 GB/s |
| Power & Thermal | |
| TDP | 400 W |
| General | |
| Form Factor | OAM |
| Architecture | Da Vinci v2 |
| Launch Year | 2024 |
Documentation & Resources
Common Use Cases
General Compute AI/ML Workloads Data Processing
The Huawei Ascend 910B is optimized for high-performance computing tasks with Da Vinci v2 architecture delivering high TFLOPS of compute power.
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