HU

Huawei Ascend 910C

Da Vinci v2 (dual-die) OAM 2025 SMIC 7nm
FP32
50.0
TFLOPS
VRAM
128 GB
HBM2e
TDP
600 W
83.3 TFLOPS/kW
Bandwidth
3.2 TB/s
memory

Performance Metrics

Peak theoretical throughput by precision type

PrecisionDescriptionBitsPeak TFLOPSEfficiency
INT88-bit integer81600.02.667 TFLOPS/W
FP1616-bit floating point16800.01.333 TFLOPS/W
BF16Brain Float 1616780.01.300 TFLOPS/W
FP3232-bit floating point3250.00.083 TFLOPS/W
FP16 Efficiency
1.333 TFLOPS/W
800.0 TFLOPS / 600W
FP32 Efficiency
0.083 TFLOPS/W
50.0 TFLOPS / 600W

Power Specifications

TDP

600 W

Max Power

690 W

Power Connector

PCIe 16-pin

Cooling

Air

Memory Specifications

Capacity

128 GB

Type

HBM2e

Bandwidth

3200 GB/s

Interface

--

Hardware & Design

Form Factor

OAM

Architecture

Da Vinci v2 (dual-die)

Process Node

SMIC 7nm

Launch Year

2025

Variant

Standard

Market Segment

Data Center

Full Specifications

Memory
VRAM128 GB
Memory TypeHBM2e
Bandwidth3.2 TB/s
Interconnect & I/O
GPU-to-GPUUnified Bus (UB)
Interconnect Bandwidth350 GB/s
Power & Thermal
TDP600 W
General
Form FactorOAM
ArchitectureDa Vinci v2 (dual-die)
Launch Year2025

Documentation & Resources

Common Use Cases

General Compute AI/ML Workloads Data Processing

The Huawei Ascend 910C is optimized for high-performance computing tasks with Da Vinci v2 (dual-die) architecture delivering 50 TFLOPS of compute power.

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