Google TPU v6e Pod
A full TPU v6e (Trillium) pod is 256 chips in a 2D torus, the largest slice being a 16x16 topology across 64 VMs. Per chip Google publishes 918 TFLOPS bf16 and 1,836 TOPS int8, giving 235.0 PFLOPS and 470.0 POPS across the pod: a 4.7x per-chip gain over v5e at the same pod size. Memory is 256 x 32 GB HBM at 1,638 GBps per chip, with 800 GBps of bidirectional inter-chip interconnect per chip. v6e is the first generation to widen the matrix unit to 256x256 multiply-accumulators, from 128x128 on every prior TPU. Google publishes no pod-level compute or power figure; the compute above is chip count times published per-chip peak. No sparse figures are published, so all figures are dense.
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System Details
GPU Configuration
System Specifications
Precision Performance Breakdown
| Precision | System Performance | Per GPU | Efficiency |
|---|---|---|---|
| 235 PFLOPS | 918 TFLOPS | — | |
| 470 POPS | 1,836 TOPS | — |
Where a vendor states a basis, the figure shown is the dense one, and any figure it publishes is listed separately. Vendors commonly headline the sparse number instead: for NVIDIA's 2:4 structured sparsity that is exactly twice the dense figure, though other vendors' sparse modes do not all follow that ratio.
Powered by Google TPU v6e
This system utilizes 256 × Google TPU v6e 32GB GPUs, each delivering exceptional performance for AI and HPC workloads.
Per GPU TDP
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Per GPU Memory
32 GB
Process Node
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Architecture
TPU
Documentation & Resources
Flopper Spec Sheet
Google TPU v6e Pod specifications, generated from our database. Printable.
Vendor product page
Google TPU v6e Pod documentation
Cloud TPU v5p
Google • 2023-12-07
Typical Use Cases
The Google TPU v6e Pod runs 256× TPU v6e GPUs over 2D torus ICI, 800 GBps bidirectional per chip, delivering 235 PFLOPS BF16 dense.