Graphcore Bow IPU
Overview
The Bow IPU, announced in March 2022, was the first processor in volume production built with wafer-on-wafer 3D stacking. Graphcore bonded a second wafer under the compute die whose only job is power delivery, putting deep trench capacitors directly beneath the logic they feed, and the cleaner supply let the same Colossus MK2 design clock at 1.85 GHz instead of 1.325. Nothing else changed: 1,472 IPU-Cores, 8,832 threads and 900 MB of In-Processor Memory, architecturally compatible with the GC200 so that existing code runs unmodified. The result is 350 TFLOPS of FP16.16 against the GC200's 250, on-chip bandwidth up from 45 to 65 TB/s, and Graphcore's claim of up to 40 percent more real-world performance and 16 percent better efficiency. Like the GC200 it has no DRAM and no card SKU: it ships four to a 1U Bow-2000 IPU-Machine, and those stack into Bow Pod systems of up to 256.
Performance
Peak theoretical throughput by precision type
| Precision | Peak |
|---|---|
FP64 | No verified data available |
FP32 32-bit floating point | 87TFLOPS |
TF32 | No verified data available |
BF16 | No verified data available |
FP16 16-bit floating point | 350TFLOPS |
FP8 | No verified data available |
FP6 | No verified data available |
FP4 | No verified data available |
INT8 | No verified data available |
Specifications
Architecture
Colossus MK2
Form Factor
No verified data available
Launch Year
2022
Process Node
No verified data available
Memory
No verified data available On-die SRAM
Bandwidth
No verified data available
TDP
No verified data available
Max power
No verified data available
Interconnect
IPU-Link
IPU-Cores
1,472
Spec Confidence
Official
Full Specifications
| Compute Engine | |
|---|---|
| IPU-Cores | 1,472 |
| Base Clock | 1.85 GHz |
| Chip Design | |
| Memory | |
| Memory | No verified data available |
| Memory Type | On-die SRAM |
| Bandwidth | No verified data available |
| Interface Width | No verified data available |
| Effective Bandwidth | 65.3 TB/s |
| On-Die SRAM | 900 MB |
| Interconnect & I/O | |
| GPU-to-GPU | IPU-Link |
| Power & Thermal | |
| TDP | No verified data available |
| Max power | No verified data available |
| General | |
| Form Factor | No verified data available |
| Architecture | Colossus MK2 |
| Process Node | No verified data available |
| Launch Year | 2022 |
Datasheet & Resources
Flopper Datasheet
Graphcore Bow IPU specifications, generated from our database. Printable.
Bow-2000 IPU-Machine Datasheet, Product description (Graphcore)
Graphcore · Latest version
Data Provenance
Every figure traced to a source
Primary Source
- Publisher
- Graphcore
- Published
- No verified data available
Data Quality
- Spec confidence
- Official
- Clock basis
- Boost
- Core precisions with figures
- 2 of 9
- Normalization
- All values in TFLOPS
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Frequently Asked Questions
How many TFLOPS does the Graphcore Bow IPU have?
The Graphcore Bow IPU delivers 87 TFLOPS FP32 and 350 TFLOPS FP16 at peak. Flopper does not currently have a verified FP8 throughput figure for it.
What is the power consumption of the Graphcore Bow IPU?
Flopper does not currently have a verified TDP (Thermal Design Power) figure for the Graphcore Bow IPU.
How much memory does the Graphcore Bow IPU have?
Flopper does not currently have verified memory capacity or bandwidth figures for the Graphcore Bow IPU.
What architecture is the Graphcore Bow IPU based on?
The Graphcore Bow IPU is based on the Colossus MK2 architecture, launched in 2022.
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