Huawei Atlas 350
Overview
The Huawei Atlas 350 is the accelerator card built on the Ascend 950PR processor, announced by Huawei VP Ma Haixu at Huawei China Partner Conference 2026 and formally on sale from 21 March 2026. It is the first Atlas card to break the long-running 300-series numbering, reflecting a new silicon generation rather than a refresh. The card is a de-rated bin of the 950PR chip rather than a straight repackaging: it carries 112 GB of HiBL 1.0 at 1.4 TB/s against the chip's 128 GB at 1.6 TB/s, exactly seven eighths of both, the signature of one memory stack fused off out of eight, and it delivers 1.56 PFLOPS of dense MXFP4 against the chip's 2 PFLOPS, a further shortfall that implies a clock or core bin on top. HiBL 1.0 is Huawei's own in-house high-bandwidth memory, developed as a lower-cost alternative to HBM3E and HBM4E and aimed at the prefill stage of inference and at recommendation workloads, which are compute-heavy and memory-light. Power is 600W, one and a half times the 400W of NVIDIA's H20, and capacity is 1.16 times the 96 GB H20, the comparison Huawei itself drew at launch. Seven Chinese server OEMs launched systems around the card, mounting up to eight of them in a 6U two-socket Kunpeng 920 chassis. Huawei has published no datasheet for the Atlas 350, no FP8 or FP16 figure, no process node and no transistor count, and its separate claim of 2.87 times the single-card compute of an H20 has no stated basis and cannot be reconciled with any published pair of numbers. The underlying silicon is catalogued separately on this site as the Ascend 950PR.
Performance
Peak theoretical throughput by precision type
| Precision | Peak |
|---|---|
FP64 | No verified data available |
FP32 | No verified data available |
TF32 | No verified data available |
BF16 Brain Float 16 | 425TFLOPS |
FP16 16-bit floating point | 425TFLOPS |
FP8 8-bit floating point | 804TFLOPS |
FP6 | 804TFLOPS |
FP4 4-bit floating point | 1,561TFLOPS |
INT8 8-bit integer | 804TOPS |
Dense peak divided by accelerator TDP. Board power only: excludes host CPUs, networking, cooling and facility overhead. TDP for this part: 600 W.
The Atlas 350 in the GPU landscape
Peak FP16 TFLOPS (dense) against TDP, single-GPU parts tracked by Flopper
Higher and further left is better: more half-precision throughput for less power.
Specifications
Architecture
Da Vinci v3
Form Factor
Custom
Launch Year
2026
Process Node
No verified data available
Memory
112 GB HiBL 1.0
Bandwidth
1,400 GB/s
TDP
600 W
Max power (Flopper estimate)
~690 W est. Flopper estimate: 600 W TDP x 1.15. The vendor publishes no maximum board power for this part.
Interconnect
Unified Bus 2.0
Spec Confidence
Official
Full Specifications
| Memory | |
|---|---|
| Memory | 112 GB |
| Memory Type | HiBL 1.0 |
| Bandwidth | 1.4 TB/s |
| Interface Width | No verified data available |
| Interconnect & I/O | |
| GPU-to-GPU | Unified Bus 2.0 |
| Power & Thermal | |
| TDP | 600 W |
| Max power (Flopper estimate) | ~690 W est. |
| Enterprise Features | |
| Compute APIs | CANN, MindSpore, PyTorch (torch_npu), vLLM-Ascend |
| General | |
| Form Factor | Custom |
| Architecture | Da Vinci v3 |
| Process Node | No verified data available |
| Launch Year | 2026 |
Datasheet & Resources
Data Provenance
Every figure traced to a source
Primary Source
- Publisher
- Huawei
- Published
- No verified data available
Data Quality
- Spec confidence
- Official
- Clock basis
- Boost
- Core precisions with figures
- 6 of 9
- Normalization
- All values in TFLOPS
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Frequently Asked Questions
How many TFLOPS does the Huawei Atlas 350 have?
The Huawei Atlas 350 delivers 425 TFLOPS FP16 and 804 TFLOPS FP8 at peak. Flopper does not currently have a verified FP32 throughput figure for it.
What is the power consumption of the Huawei Atlas 350?
The Huawei Atlas 350 has a TDP (Thermal Design Power) rating of 600 watts.
How much memory does the Huawei Atlas 350 have?
The Huawei Atlas 350 is equipped with 112 GB of memory with 1,400 GB/s of memory bandwidth.
What architecture is the Huawei Atlas 350 based on?
The Huawei Atlas 350 is based on the Da Vinci v3 architecture, launched in 2026.
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