MetaX C500
Overview
The MetaX (沐曦) C500 (曦云 / MXC500) is MetaX's self-developed 7nm training GPGPU (XCORE ISA, CUDA-compatible via the MXMACA stack), with first silicon in 2023. Vendor-stated dense peaks: 18 TFLOPS FP32 (native; a 36 TFLOPS FP32 matrix mode and an early "15 TFLOPS" press figure also circulate), 140 TFLOPS TF32, 280 TFLOPS FP16/BF16, and 560 TOPS INT8 — none independently benchmarked, hence vendor_claimed. Memory is 64 GB HBM2E in a 350W board with the MetaXLink interconnect (7 ports; per-link GB/s not published). Memory bandwidth is left NULL because third-party sources conflict (1.2 vs 1.8 TB/s) and it is not on MetaX's official page. The C500 explicitly does NOT support FP8, so no FP8 row is added.
Performance
Peak theoretical throughput by precision type
| Precision | Peak |
|---|---|
FP64 | No verified data available |
FP32 32-bit floating point | 18TFLOPS |
TF32 TensorFloat-32 | 140TFLOPS |
BF16 Brain Float 16 | 280TFLOPS |
FP16 16-bit floating point | 280TFLOPS |
FP8 | No verified data available |
FP6 | No verified data available |
FP4 | No verified data available |
INT8 8-bit integer | 560TOPS |
Dense peak divided by accelerator TDP. Board power only: excludes host CPUs, networking, cooling and facility overhead. TDP for this part: 350 W.
The C500 in the GPU landscape
Peak FP16 TFLOPS (dense) against TDP, single-GPU parts tracked by Flopper
Higher and further left is better: more half-precision throughput for less power.
Specifications
Architecture
XCORE GPGPU
Form Factor
PCIe
Launch Year
2023
Process Node
7nm
Memory
64 GB HBM2E
Bandwidth
No verified data available
TDP
350 W
Max power
350 W
Interconnect
MetaXLink
Spec Confidence
Vendor claimed
Full Specifications
| Memory | |
|---|---|
| Memory | 64 GB |
| Memory Type | HBM2E |
| Bandwidth | No verified data available |
| Interface Width | No verified data available |
| Interconnect & I/O | |
| GPU-to-GPU | MetaXLink |
| Power & Thermal | |
| TDP | 350 W |
| Max power | 350 W |
| Enterprise Features | |
| ECC Memory | Yes |
| General | |
| Form Factor | PCIe |
| Architecture | XCORE GPGPU |
| Process Node | 7nm |
| Launch Year | 2023 |
Datasheet & Resources
Data Provenance
Every figure traced to a source
Primary Source
- Document
- MetaX C500 (Xiyun) product page
- Publisher
- MetaX
- Published
- No verified data available
Data Quality
- Spec confidence
- Vendor claimed
- Clock basis
- Boost
- Core precisions with figures
- 5 of 9
- Normalization
- All values in TFLOPS
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Pre-configured systems featuring the MetaX C500
| System | GPU Count | Peak Performance | Total Power | |
|---|---|---|---|---|
MetaX 曦云C500服务器 (C500 Server) 曦云 · rack · | 8x C500 | No verified data available | No verified data available | View System |
Frequently Asked Questions
How many TFLOPS does the MetaX C500 have?
The MetaX C500 delivers 18 TFLOPS FP32 and 280 TFLOPS FP16 at peak. Flopper does not currently have a verified FP8 throughput figure for it.
What is the power consumption of the MetaX C500?
The MetaX C500 has a TDP (Thermal Design Power) rating of 350 watts.
How much memory does the MetaX C500 have?
The MetaX C500 is equipped with 64 GB of memory. Flopper does not currently have a verified memory bandwidth figure for it.
What architecture is the MetaX C500 based on?
The MetaX C500 is based on the XCORE GPGPU architecture, launched in 2023.
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