Cerebras WSE-3

The Cerebras Wafer Scale Engine 3 is a single chip the size of a wafer: 46,225 mm2 of TSMC 5nm silicon carrying 4 trillion transistors and 900,000 cores optimised for sparse linear algebra, with 44 GB of on-chip SRAM at 21 PB/s and 214 Pb/s of on-wafer fabric bandwidth. It has no external memory at all — the 44 GB of SRAM is the entire memory system, which is why the usual DRAM capacity and bandwidth figures are blank rather than missing. Cerebras publishes a single compute figure of 125 petaFLOPS, and a footnote on its own datasheet states plainly that FLOPS are shown as sparse. That sparsity is unstructured rather than the 2:4 structured kind, so no dense figure can be derived from it by halving, and none is published; this entry therefore carries no precision figures at all rather than a number that would be compared against dense figures elsewhere on this site.