T-Head Zhenwu M890 NEW
Overview
The Zhenwu M890 is T-Head's second-generation AI accelerator, shown for the first time at the 2026 Alibaba Cloud Summit on 20 May 2026 inside the Panjiu AL128 supernode. It carries 144 GB of HBM, eight independent ICN ports with 800 GB/s of inter-chip bandwidth and a PCIe 5.0 x16 host interface, and it is the generation where T-Head added FP8 and FP4 to a range that already covered FP32, BF16 and FP16, so that one part can serve high-precision training and very low precision inference. It is also the generation where the interconnect stopped being only a mesh: an ICN Switch makes 64 cards behave as one flat full-bandwidth domain, and Alibaba packs 128 of them into a single rack with peer-to-peer latency below 150 nanoseconds. T-Head claims three times the performance of the Zhenwu 810E and publishes no figure on either side of that ratio, which is why every precision on this row is listed as supported with no rate.
Performance
Peak theoretical throughput by precision type
| Precision | Peak |
|---|---|
FP64 | No verified data available |
FP32 32-bit floating point | No verified data available |
TF32 | No verified data available |
BF16 Brain Float 16 | No verified data available |
FP16 16-bit floating point | No verified data available |
FP8 8-bit floating point | No verified data available |
FP6 | No verified data available |
FP4 4-bit floating point | No verified data available |
INT8 8-bit integer | No verified data available |
Flopper holds no verified throughput figures for this part yet. The rows stay so the gaps are visible.
Specifications
Architecture
Zhenwu
Form Factor
No verified data available
Launch Year
2026
Process Node
No verified data available
Memory
144 GB HBM
Bandwidth
No verified data available
TDP
No verified data available
Max power
No verified data available
Interconnect
800 GB/s ICN Link
direction and scope not stated by vendor
Spec Confidence
Official
Full Specifications
| Memory | |
|---|---|
| Memory | 144 GB |
| Memory Type | HBM |
| Bandwidth | No verified data available |
| Interface Width | No verified data available |
| Interconnect & I/O | |
| GPU-to-GPU | ICN Link |
| Interconnect Bandwidth | 800 GB/s direction and scope not stated by vendor |
| Interconnect Links | 8 |
| PCIe | 5.0 x16 |
| Power & Thermal | |
| TDP | No verified data available |
| Max power | No verified data available |
| General | |
| Form Factor | No verified data available |
| Architecture | Zhenwu |
| Process Node | No verified data available |
| Launch Year | 2026 |
Datasheet & Resources
Flopper Datasheet
T-Head Zhenwu M890 specifications, generated from our database. Printable.
Vendor product page
T-Head documentation for the Zhenwu M890
Zhenwu M890 product page (T-Head)
T-Head · Latest version
Data Provenance
Every figure traced to a source
Primary Source
- Document
- Zhenwu M890 product page (T-Head)
- Publisher
- T-Head
- Published
- No verified data available
Data Quality
- Spec confidence
- Official
- Clock basis
- Boost
- Core precisions with figures
- 0 of 9
- Normalization
- All values in TFLOPS
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Frequently Asked Questions
How many TFLOPS does the T-Head Zhenwu M890 have?
Flopper does not currently have any verified throughput figures for the T-Head Zhenwu M890.
What is the power consumption of the T-Head Zhenwu M890?
Flopper does not currently have a verified TDP (Thermal Design Power) figure for the T-Head Zhenwu M890.
How much memory does the T-Head Zhenwu M890 have?
The T-Head Zhenwu M890 is equipped with 144 GB of memory. Flopper does not currently have a verified memory bandwidth figure for it.
What architecture is the T-Head Zhenwu M890 based on?
The T-Head Zhenwu M890 is based on the Zhenwu architecture, launched in 2026.
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