T-Head Zhenwu V900 NEW
Overview
The Zhenwu V900 is the chip Alibaba announced at its Apsara Conference on 22 September 2026 and called the most powerful AI processor designed in China. It carries 216 GB of memory and 1,200 GB/s of inter-chip bandwidth, and its headline is scale rather than arithmetic: two layers of ICN Switch put 1,024 V900s into a single full-bandwidth Scale-Up domain with symmetric bandwidth and memory-semantic addressing throughout, and Alibaba says a cluster built on the same network can reach 500,000 accelerators. The tensor units get a precision overhaul aimed at low-precision inference, with improved FP8 and FP4 instruction accuracy and a wider choice of scaling-factor formats and block sizes for MXFP8 and MXFP4. T-Head claims three times the performance of the Zhenwu M890 and, as with every Zhenwu part before it, publishes no throughput figure at all. Mass production and general deployment are scheduled for the first quarter of 2027, so nothing here has been measured by anyone outside Alibaba.
Performance
Peak theoretical throughput by precision type
| Precision | Peak |
|---|---|
FP64 | No verified data available |
FP32 32-bit floating point | No verified data available |
TF32 | No verified data available |
BF16 | No verified data available |
FP16 | No verified data available |
FP8 8-bit floating point | No verified data available |
FP6 | No verified data available |
FP4 4-bit floating point | No verified data available |
INT8 | No verified data available |
Flopper holds no verified throughput figures for this part yet. The rows stay so the gaps are visible.
Specifications
Architecture
Zhenwu
Form Factor
No verified data available
Launch Year
2026
Process Node
No verified data available
Memory
216 GB
Bandwidth
No verified data available
TDP
No verified data available
Max power
No verified data available
Interconnect
1.2 TB/s ICN
direction and scope not stated by vendor
Spec Confidence
Vendor claimed
Full Specifications
| Memory | |
|---|---|
| Memory | 216 GB |
| Memory Type | No verified data available |
| Bandwidth | No verified data available |
| Interface Width | No verified data available |
| Interconnect & I/O | |
| GPU-to-GPU | ICN |
| Interconnect Bandwidth | 1.2 TB/s direction and scope not stated by vendor |
| Power & Thermal | |
| TDP | No verified data available |
| Max power | No verified data available |
| General | |
| Form Factor | No verified data available |
| Architecture | Zhenwu |
| Process Node | No verified data available |
| Launch Year | 2026 |
Datasheet & Resources
Flopper Datasheet
T-Head Zhenwu V900 specifications, generated from our database. Printable.
Zhenwu V900 product page (T-Head)
T-Head · Latest version
Data Provenance
Every figure traced to a source
Primary Source
- Document
- Zhenwu V900 product page (T-Head)
- Publisher
- T-Head
- Published
- No verified data available
Data Quality
- Spec confidence
- Vendor claimed
- Clock basis
- Boost
- Core precisions with figures
- 0 of 9
- Normalization
- All values in TFLOPS
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Frequently Asked Questions
How many TFLOPS does the T-Head Zhenwu V900 have?
Flopper does not currently have any verified throughput figures for the T-Head Zhenwu V900.
What is the power consumption of the T-Head Zhenwu V900?
Flopper does not currently have a verified TDP (Thermal Design Power) figure for the T-Head Zhenwu V900.
How much memory does the T-Head Zhenwu V900 have?
The T-Head Zhenwu V900 is equipped with 216 GB of memory. Flopper does not currently have a verified memory bandwidth figure for it.
What architecture is the T-Head Zhenwu V900 based on?
The T-Head Zhenwu V900 is based on the Zhenwu architecture, launched in 2026.
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